The structure of many electrical power systems includes multiple power modules joined in parallel by a common power bus. ORing circuit elements are typically included between the power supply module's output and the power bus to prevent a failure of one power supply module from drawing down the power bus and leading to a complete failure of the power system. There are several common ORing element designs, each having certain disadvantages.
One common ORing element is a simple diode placed in series between a power supply module's output and the power bus. When the output voltage of the power supply module is sufficiently greater than the voltage at the power bus, the diode is forward-biased, allowing current to flow from the power supply module to the power bus. If, however, the output of the power supply module drops below the output of the power bus, then the diode will be reverse biased. When the diode is reverse biased, the power supply module is essentially prevented from drawing reverse current from the power bus, thereby preventing a potential failure of the power system.
An ideal diode would be an ideal ORing element but real diodes have significant forward drop voltages and for many applications the associated power dissipation makes the use of simple diodes unattractive. Accordingly, it has become common practice to use one or more field effect transistors (FETs) as the ORing element in some applications. One FET or multiple FETs are chosen based on some combination of criteria, voltage rating, cost, size, etc., with sufficiently low on-resistance to result in acceptable power dissipation under appropriate conditions of output current.
Another common ORing element design includes a FET or FETs controlled by a comparator circuit. The comparator circuit senses the difference between the output voltage of the power supply module and the voltage at the power bus, and turns the FET on or off accordingly. That is, when the voltage difference between the power supply module and the power bus is greater than a threshold voltage the FET(s) is (are) turned on. The output current is then allowed to flow from the power supply module to the power bus with a voltage drop essentially equal to the product of the magnitude of the output current and the on-resistance of the FET (or effective resistance of paralleled FETs). When the voltage difference is less than the threshold voltage, the FET is biased off.
Comparator circuits used to control FET-based ORing elements have disadvantages that stem from the fact that real comparators have finite offset voltages associated with their input circuitry. The offset voltage means that there will always be some error in setting (or determining) the threshold voltage at which the control function will turn the FET on or off. If the threshold is positive the comparator could oscillate between on and off for some sufficiently low output current and cause a step voltage on the power bus. For this reason comparator based ORing control circuits typically are designed to have a small but always negative threshold. If the threshold is negative a significant reverse current, from the power bus to the power supply, will be allowed to flow before the voltage drop is high enough in this reverse direction to trip the threshold an cause the FET(s) to be shut off.
As an example, the typical threshold for commercially available ORing FET integrated circuits is −10 milli-volts. In a typical system that employs 100 A power supplies (or power supply modules) the paralleled ORing FET resistance might be 500 micro Ohms or less. A reverse voltage of −10 milli-volts would correspond to the undesirable situation of at least 20 amps of current flowing from the power bus to the power supply before the FETs are turned off.